#ifndef __RK3128_IRQ_H__
#define __RK3128_IRQ_H__

#ifdef __cplusplus
extern "C" {
#endif

#define RK3128_IRQ_HYPERVISOR_TIMER			(26)
#define RK3128_IRQ_VIRTUAL_TIMER			(27)
#define RK3128_IRQ_SECURE_PHYSICAL_TIMER	(29)
#define RK3128_IRQ_NONSECURE_PHYSICAL_TIMER	(30)

#define RK3128_IRQ_DMAC_0					(32)
#define RK3128_IRQ_DMAC_1					(33)
#define RK3128_IRQ_DDR_PCTL					(34)
#define RK3128_IRQ_GPU_GP					(35)
#define RK3128_IRQ_GPU_MMU					(36)
#define RK3128_IRQ_GPU_PP					(37)
#define RK3128_IRQ_VEPU						(38)
#define RK3128_IRQ_VDPU						(39)
#define RK3128_IRQ_CIF						(40)
#define RK3128_IRQ_LCDC						(41)
#define RK3128_IRQ_USB_OTG					(42)
#define RK3128_IRQ_USB_HOST					(43)
#define RK3128_IRQ_GPS						(44)
#define RK3128_IRQ_GPS_TIMER				(45)
#define RK3128_IRQ_SDMMC					(46)
#define RK3128_IRQ_SDIO						(47)
#define RK3128_IRQ_EMMC						(48)
#define RK3128_IRQ_SARADC					(49)
#define RK3128_IRQ_NANDC					(50)
#define RK3128_IRQ_I2S_2CH					(51)
#define RK3128_IRQ_UART0					(52)
#define RK3128_IRQ_UART1					(53)
#define RK3128_IRQ_UART2					(54)
#define RK3128_IRQ_SPI						(55)
#define RK3128_IRQ_I2C0						(56)
#define RK3128_IRQ_I2C1						(57)
#define RK3128_IRQ_I2C2						(58)
#define RK3128_IRQ_I2C3						(59)
#define RK3128_IRQ_TIMER0					(60)
#define RK3128_IRQ_TIMER1					(61)
#define RK3128_IRQ_PWM						(62)
#define RK3128_IRQ_PMU						(63)
#define RK3128_IRQ_USB_HOST_OHCI			(64)
#define RK3128_IRQ_MIPI_CTRL				(65)
#define RK3128_IRQ_WDT						(66)
#define RK3128_IRQ_OTG_BVALID				(67)
#define RK3128_IRQ_GPIO0					(68)
#define RK3128_IRQ_GPIO1					(69)
#define RK3128_IRQ_GPIO2					(70)
#define RK3128_IRQ_GPIO3					(71)
#define RK3128_IRQ_CRYPTO					(72)
#define RK3128_IRQ_PERI_AHB_USB_ARBITER		(74)
#define RK3128_IRQ_RGA						(76)
#define RK3128_IRQ_HDMI						(77)
#define RK3128_IRQ_SDMMC_DETECT				(78)
#define RK3128_IRQ_SDIO_DETECT				(79)
#define RK3128_IRQ_IEP						(80)
#define RK3128_IRQ_EBC						(81)
#define RK3128_IRQ_SFC						(82)
#define RK3128_IRQ_OTG0_ID					(83)
#define RK3128_IRQ_OTG0_LINESTATE			(84)
#define RK3128_IRQ_OTG1_LINESTATE			(85)
#define RK3128_IRQ_SD_DETECTN				(86)
#define RK3128_IRQ_SPDIF					(87)
#define RK3128_IRQ_GMAC						(88)
#define RK3128_IRQ_GMAC_TMC					(89)
#define RK3128_IRQ_TSP						(90)
#define RK3128_IRQ_TIMER2					(91)
#define RK3128_IRQ_TIMER3					(92)
#define RK3128_IRQ_TIMER4					(93)
#define RK3128_IRQ_TIMER5					(94)
#define RK3128_IRQ_SIM_CARD					(95)
#define RK3128_IRQ_ACODEC_DETECT			(96)
#define RK3128_IRQ_HEVC_MMU					(97)
#define RK3128_IRQ_HEVC_DEC					(98)
#define RK3128_IRQ_VPU_MMU					(99)
#define RK3128_IRQ_I2S_8CH					(100)
#define RK3128_IRQ_ARM_PMU_A7_0				(108)
#define RK3128_IRQ_ARM_PMU_A7_1				(109)
#define RK3128_IRQ_ARM_PMU_A7_2				(110)
#define RK3128_IRQ_ARM_PMU_A7_3				(111)
#define RK3128_IRQ_AXI_ERR					(112)

#define RK3128_IRQ_GPIO0_A0					(128)
#define RK3128_IRQ_GPIO0_A1					(129)
#define RK3128_IRQ_GPIO0_A2					(130)
#define RK3128_IRQ_GPIO0_A3					(131)
#define RK3128_IRQ_GPIO0_A4					(132)
#define RK3128_IRQ_GPIO0_A5					(133)
#define RK3128_IRQ_GPIO0_A6					(134)
#define RK3128_IRQ_GPIO0_A7					(135)
#define RK3128_IRQ_GPIO0_B0					(136)
#define RK3128_IRQ_GPIO0_B1					(137)
#define RK3128_IRQ_GPIO0_B2					(138)
#define RK3128_IRQ_GPIO0_B3					(139)
#define RK3128_IRQ_GPIO0_B4					(140)
#define RK3128_IRQ_GPIO0_B5					(141)
#define RK3128_IRQ_GPIO0_B6					(142)
#define RK3128_IRQ_GPIO0_B7					(143)
#define RK3128_IRQ_GPIO0_C0					(144)
#define RK3128_IRQ_GPIO0_C1					(145)
#define RK3128_IRQ_GPIO0_C2					(146)
#define RK3128_IRQ_GPIO0_C3					(147)
#define RK3128_IRQ_GPIO0_C4					(148)
#define RK3128_IRQ_GPIO0_C5					(149)
#define RK3128_IRQ_GPIO0_C6					(150)
#define RK3128_IRQ_GPIO0_C7					(151)
#define RK3128_IRQ_GPIO0_D0					(152)
#define RK3128_IRQ_GPIO0_D1					(153)
#define RK3128_IRQ_GPIO0_D2					(154)
#define RK3128_IRQ_GPIO0_D3					(155)
#define RK3128_IRQ_GPIO0_D4					(156)
#define RK3128_IRQ_GPIO0_D5					(157)
#define RK3128_IRQ_GPIO0_D6					(158)
#define RK3128_IRQ_GPIO0_D7					(159)

#define RK3128_IRQ_GPIO1_A0					(160)
#define RK3128_IRQ_GPIO1_A1					(161)
#define RK3128_IRQ_GPIO1_A2					(162)
#define RK3128_IRQ_GPIO1_A3					(163)
#define RK3128_IRQ_GPIO1_A4					(164)
#define RK3128_IRQ_GPIO1_A5					(165)
#define RK3128_IRQ_GPIO1_A6					(166)
#define RK3128_IRQ_GPIO1_A7					(167)
#define RK3128_IRQ_GPIO1_B0					(168)
#define RK3128_IRQ_GPIO1_B1					(169)
#define RK3128_IRQ_GPIO1_B2					(170)
#define RK3128_IRQ_GPIO1_B3					(171)
#define RK3128_IRQ_GPIO1_B4					(172)
#define RK3128_IRQ_GPIO1_B5					(173)
#define RK3128_IRQ_GPIO1_B6					(174)
#define RK3128_IRQ_GPIO1_B7					(175)
#define RK3128_IRQ_GPIO1_C0					(176)
#define RK3128_IRQ_GPIO1_C1					(177)
#define RK3128_IRQ_GPIO1_C2					(178)
#define RK3128_IRQ_GPIO1_C3					(179)
#define RK3128_IRQ_GPIO1_C4					(180)
#define RK3128_IRQ_GPIO1_C5					(181)
#define RK3128_IRQ_GPIO1_C6					(182)
#define RK3128_IRQ_GPIO1_C7					(183)
#define RK3128_IRQ_GPIO1_D0					(184)
#define RK3128_IRQ_GPIO1_D1					(185)
#define RK3128_IRQ_GPIO1_D2					(186)
#define RK3128_IRQ_GPIO1_D3					(187)
#define RK3128_IRQ_GPIO1_D4					(188)
#define RK3128_IRQ_GPIO1_D5					(189)
#define RK3128_IRQ_GPIO1_D6					(190)
#define RK3128_IRQ_GPIO1_D7					(191)

#define RK3128_IRQ_GPIO2_A0					(192)
#define RK3128_IRQ_GPIO2_A1					(193)
#define RK3128_IRQ_GPIO2_A2					(194)
#define RK3128_IRQ_GPIO2_A3					(195)
#define RK3128_IRQ_GPIO2_A4					(196)
#define RK3128_IRQ_GPIO2_A5					(197)
#define RK3128_IRQ_GPIO2_A6					(198)
#define RK3128_IRQ_GPIO2_A7					(199)
#define RK3128_IRQ_GPIO2_B0					(200)
#define RK3128_IRQ_GPIO2_B1					(201)
#define RK3128_IRQ_GPIO2_B2					(202)
#define RK3128_IRQ_GPIO2_B3					(203)
#define RK3128_IRQ_GPIO2_B4					(204)
#define RK3128_IRQ_GPIO2_B5					(205)
#define RK3128_IRQ_GPIO2_B6					(206)
#define RK3128_IRQ_GPIO2_B7					(207)
#define RK3128_IRQ_GPIO2_C0					(208)
#define RK3128_IRQ_GPIO2_C1					(209)
#define RK3128_IRQ_GPIO2_C2					(210)
#define RK3128_IRQ_GPIO2_C3					(211)
#define RK3128_IRQ_GPIO2_C4					(212)
#define RK3128_IRQ_GPIO2_C5					(213)
#define RK3128_IRQ_GPIO2_C6					(214)
#define RK3128_IRQ_GPIO2_C7					(215)
#define RK3128_IRQ_GPIO2_D0					(216)
#define RK3128_IRQ_GPIO2_D1					(217)
#define RK3128_IRQ_GPIO2_D2					(218)
#define RK3128_IRQ_GPIO2_D3					(219)
#define RK3128_IRQ_GPIO2_D4					(220)
#define RK3128_IRQ_GPIO2_D5					(221)
#define RK3128_IRQ_GPIO2_D6					(222)
#define RK3128_IRQ_GPIO2_D7					(223)

#define RK3128_IRQ_GPIO3_A0					(224)
#define RK3128_IRQ_GPIO3_A1					(225)
#define RK3128_IRQ_GPIO3_A2					(226)
#define RK3128_IRQ_GPIO3_A3					(227)
#define RK3128_IRQ_GPIO3_A4					(228)
#define RK3128_IRQ_GPIO3_A5					(229)
#define RK3128_IRQ_GPIO3_A6					(230)
#define RK3128_IRQ_GPIO3_A7					(231)
#define RK3128_IRQ_GPIO3_B0					(232)
#define RK3128_IRQ_GPIO3_B1					(233)
#define RK3128_IRQ_GPIO3_B2					(234)
#define RK3128_IRQ_GPIO3_B3					(235)
#define RK3128_IRQ_GPIO3_B4					(236)
#define RK3128_IRQ_GPIO3_B5					(237)
#define RK3128_IRQ_GPIO3_B6					(238)
#define RK3128_IRQ_GPIO3_B7					(239)
#define RK3128_IRQ_GPIO3_C0					(240)
#define RK3128_IRQ_GPIO3_C1					(241)
#define RK3128_IRQ_GPIO3_C2					(242)
#define RK3128_IRQ_GPIO3_C3					(243)
#define RK3128_IRQ_GPIO3_C4					(244)
#define RK3128_IRQ_GPIO3_C5					(245)
#define RK3128_IRQ_GPIO3_C6					(246)
#define RK3128_IRQ_GPIO3_C7					(247)
#define RK3128_IRQ_GPIO3_D0					(248)
#define RK3128_IRQ_GPIO3_D1					(249)
#define RK3128_IRQ_GPIO3_D2					(250)
#define RK3128_IRQ_GPIO3_D3					(251)
#define RK3128_IRQ_GPIO3_D4					(252)
#define RK3128_IRQ_GPIO3_D5					(253)
#define RK3128_IRQ_GPIO3_D6					(254)
#define RK3128_IRQ_GPIO3_D7					(255)

#ifdef __cplusplus
}
#endif

#endif /* __RK3128_IRQ_H__ */
